Models and Algorithms under Asymmetric Read and Write Costs

In several emerging non-volatile technologies for main memory (NVRAM) the cost of reading is significantly cheaper than the cost of writing. Such asymmetry in memory costs leads to a desire for “writeefficient” algorithms that minimize the number of writes to the NVRAM. While several prior works have explored write-efficient algorithms for databases or for the unique properties of NAND Flash, our ongoing work seeks to develop a broader theory of algorithm design for asymmetric memories. This talk will highlight our recent progress on models, algorithms, and lower bounds for asymmetric memories [1], [2], [3]. We extend the classic RAM model to the asymmetric case by defining the (M,ω)-ARAM, which consists of a large asymmetric memory and a much smaller symmetric memory of size M , both random access, such that for the asymmetric memory, writes cost ω > 1 times more than reads. We present algorithms for search trees, priority queues, sorting, dynamic programming, BFSand DFS-related graph algorithms, and shortest paths. We also present novel lower bounds for several problems that reveal fundamental limits on obtaining write-efficient algorithms for these problems. Finally, we propose and study models for asymmetric memories that consider block transfers and/or parallel processing.